1. Field of the Invention
This invention relates generally to the field of computer graphics and more specifically to a method and apparatus for improving the performance of frame buffer memory in a computer graphics system.
2. Related Art
Computer graphics systems are commonly used for displaying two-and three-dimensional graphics representations of objects on a two-dimensional video display screen. Current computer graphics systems provide highly detailed representations and are used in a variety of applications.
In a typical computer graphics system an object or model to be represented on the display screen is broken down into graphics primitives. Primitives are basic components of a graphics display and may include, for example, points, lines, quadrilaterals, triangle strips and polygons. Typically, a hardware/software scheme is implemented to render, or draw, the graphics primitives that represent a view of one or more objects being represented on the display screen.
Generally, the primitives of the three-dimensional object to be rendered are defined by a host computer in terms of primitive data. For example, when the primitive is a triangle, the host computer may define the primitives in terms of the X, Y, Z and W coordinates of its vertices, as well as the red, green and blue and alpha (R, G, B and .alpha.) color values of each vertex. Additional primitive data may be used in specific applications. Rendering hardware interpolates the primitive data to compute the coordinates and colors of display screen pixels that represent each primitive, and the R, G and B color values for each pixel.
The basic components of a computer graphics system typically include a geometry accelerator, a rasterizer and a frame buffer. The system may also include other hardware such as texture mapping hardware. The geometry accelerator receives primitive data from the host computer that defines the primitives that make up the model view to be displayed. The geometry accelerator performs transformations on the primitive data and performs such functions as lighting, clipping and plane equation calculations for each primitive. The output of the geometry accelerator, referred to as rendering data, is used by the rasterizer and the texture mapping hardware to generate final screen coordinate and color data for each pixel in each primitive. The pixel data from the rasterizer and the pixel data from the texture mapping hardware, if available, are combined by a memory controller which controls the writing of the data into a coupled frame buffer memory.
The frame buffer memory stores pixel data corresponding to an image to be displayed on a coupled display device. Pixel data is periodically transferred out of the frame buffer memory to a digital to analog converter which provides analog R, G, B color information for controlling the display of pixels on the display devices. Thus, in order to change the representation of an image on the display device, the pixel color data stored in the frame buffer memory is changed by the graphics hardware.
In general, data for each pixel may comprise up to 60 bits of information including 32 bits of R, G, B and .alpha. color information, 24 bits of depth information and 4 bits of stenciling information. The volume of data transferred through the host computer and the graphics hardware is therefore extremely large. In order to provide high performance graphics displays, the data in the frame buffer must be updated at rates that allow for the perception of real-time movement of images. Accordingly, it can be appreciated that the maintenance of high bandwidth communication at the frame buffer memory is critical to providing high performance graphic displays.
The frame buffer memory is typically arranged in an orderly fashion, with rows and columns of the frame buffer memory corresponding to pixel locations on the display screen. Unfortunately, graphics applications executing on a host computer do not always update the frame buffer memory in a manner that allows for maximum utilization of the frame buffer memory cycles. For example, when the graphics application renders primitives, it may occur that updates to the frame buffer memory alternate between rows of frame buffer memory. Such operations hinder the overall memory performance, since, in typical frame buffer memory devices, such as a synchronous graphics RAM (SGRAM), a certain amount of time is required to precharge a row before it is accessed. Therefore, accesses to alternating rows of the frame buffer memory undermine the performance of the frame buffer memory.
A further problem results when using SGRAMs that are apportioned into multiple independently accessible sections, referred to as banks. Although providing multiple banks increases the flexibility of addressing memory, delays are incurred during memory operation when changing between row addresses in either of the banks. Delays are incurred when changing row addresses because each time that a row address is changed, the bank must be precharged and activated with the new row address. Delays are also incurred when switching between write operations and read operations at either bank. An increase in delays at frame buffer memory serves to reduce the overall performance of the graphics system because the number of operations that may be performed in a given time interval are reduced. Accordingly, it is an object of the invention to improve the performance of frame buffer memory.